pll_u: boot with h/w control already set Tegra Revision: A02 SKU: 0x17 CPU Process: 0 Core Process: 0 Bootrom patch v0x3f Tegra21: CPU Speedo value 2029, Soc Speedo value 1933, Gpu Speedo value 2031 Tegra21: CPU Process ID 0, Soc Process ID 0, Gpu Process ID 0 Tegra21: CPU Speedo ID 7, Soc Speedo ID 0, Gpu Speedo ID 2 DTS File Name: /dvs/git/dirty/git-master_linux/kernel/arch/arm64/boot/dts/tegra210-jetson-tx1-p2597-2180-a01-devkit.dts psci: Using standard PSCI v0.2 function IDs psci: probing for conduit method from DT. Normal zone: 524288 pages, LIFO batch:31 Reserved memory: initialized node iram-carveout, compatible id nvidia,iram-carveoutīootloader framebuffer: 00000000 - 00000000īootloader framebuffer2: 00000000 - 00000000īootloader Debug Data: 00000000 - 00000000 alternative: enabling workaround for ARM erratum 832075 ![]() Linux version 3.10.96-tegra (gcc version 4.8.2 (GCC) ) #1 SMP PREEMPT Sat Jan 14 13:20:
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